Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2011-07-19
2011-07-19
Tsai, Henry W (Department: 2184)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S019000
Reexamination Certificate
active
07984211
ABSTRACT:
A forced lock-step operation between a CPU (software) and the hardware is eliminated by unburdening the CPU from monitoring the hardware until it is finished with its task. This is done by providing a data/control message queue into which the CPU writes combined data/control messages and places an End tag into the queue when finished. The hardware checks the content of the message queue and starts decoding the incoming data. The hardware processes the data read from the message queue and the processed data is then written back into the message queue for use by the software. The hardware raises an interrupt signal to the CPU when reaching the End tag. Speed differences between hardware and software can be compensated for by changing the depth of the queue.
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Chang Cheng-Lun
Durvasula Uma Shankar
Ren Jau-Wen
Tsai Ching-Han
Wang Lincheng
Beyer Law Group LLP
Mobilic Technology (Cayman) Corp.
Rhu Kris
Tsai Henry W
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