Self sealed aligned contact incorporating a dopant source

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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Details

257760, 257773, H01L 2348, H01L 2944

Patent

active

052162818

ABSTRACT:
In a contact structure to a source/drain region (28) nearby a gate electrode (22), a contact sidewall through a thick dielectric is laterally displaced away from the S/D region to widen the contact; the contact sidewall is located over the gate electrode A remnant (60a) of a doped silicon layer overlies the S/D and rises up along the sidewall of gate electrode insulation and onto insulation atop the gate electrode, and is insulated from the gate electrode thereby. The doped silicon acting as a dopant for the source/drain region. A nitride, preferably Si.sub.3 N.sub.4, is located under the thick dielectric and over part of the gate electrode insulation. The Si.sub.3 N.sub.4 adjoins the doped silicon to enclose the top and sides of the gate electrode with nitride. The bottom of the contact is formed by the doped silicon at some locations and by the nitride at other locations. The contact sidewall through the thick dielectric preferably overlies the Si.sub.3 N.sub.4 but not the doped silicon. The doped silicon is effective as a dry etch stop and a wet etch stop, and the silicon nitride is effective as an isotropic etch stop. The doped silicon is wholly contained within the contact, and the nitride extends beyond said contact.

REFERENCES:
patent: 4556897 (1985-12-01), Yorikane et al.
patent: 4570331 (1986-02-01), Eaton, Jr. et al.
patent: 4686000 (1987-08-01), Heath
patent: 4784973 (1988-11-01), Stevens et al.
patent: 4811078 (1989-03-01), Tigelaar et al.
patent: 4897709 (1990-01-01), Yokoyama et al.
patent: 5043790 (1991-08-01), Butler

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