Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2007-12-11
2007-12-11
Nguyen, Tan T. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S211000, C365S233100
Reexamination Certificate
active
11297646
ABSTRACT:
A self-refresh timer circuit for generating a timer period for controlling self-refresh operation of a semiconductor memory device comprising: a temperature-dependent voltage source for outputting a voltage having a temperature dependency based on a diode characteristic; a control current generating circuit for applying an output voltage of the temperature-dependent voltage source to a temperature detecting device having a diode characteristic and for generating a control current having a magnitude in proportion to a current flowing through the temperature detecting device; and a timer period generating circuit for generating a timer period in inverse proportion to the magnitude of the control current.
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patent: 6956397 (2005-10-01), Lim et al.
patent: 2003/0189859 (2003-10-01), Takahashi et al.
patent: 2002-117671 (2002-04-01), None
Kim et al.; “A Low-Power 256-Mb SDRAM With an On-Chip Thermometer and Biased Reference Line Sensing Scheme”;IEEE Journal of Solid-State Circuits; vol. 38, No. 2; c. 2003; pp. 329-337.
Kajigaya Kazuhiko
Matsui Yoshinori
Onodera Tadashi
Tanaka Hitoshi
Yamamoto Akiyoshi
Elpida Memory Inc.
Nguyen Tan T.
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