Self-refresh apparatus for a semiconductor memory device

Details Self-refresh apparatus for a semiconductor memory device Self-refresh apparatus for a semiconductor memory device

1999-12-21

2001-05-08

Nelms, David (Department: 2818)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S194000, C365S230030

Reexamination Certificate

active

06229747

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a self-refresh apparatus for a semiconductor memory device and more particularly, to a self-refresh apparatus for self-refreshing a memory cells of a semiconductor memory device such as a dynamic random access memory (DRAM).
2. Description of the Conventional Art
A typical DRAM configuration is a one-transistor memory device configuration in which each one-bit memory cell is composed of a MOS transistor and a capacitor. In this case, the data in memory cells will disappear as time passes because of leakaging currents. Accordingly, the DRAM requires a refresh operation to be carried out at predetermined intervals, to read stored data from the memory and to rewrite the data to the memory.
FIG. 1
shows a block diagram for performing a conventional self-refresh operation. As shown in
FIG. 1
, when a self-refresh command (selfref command) is inputted to a self-refresh state control unit (
1
), the self-refresh state control unit (
1
) outputs a self-refresh state signal (sref) to a ring oscillator (
2
).
The ring oscillator (
2
) is operated by the self-refresh state signal (sref) and produces a pulse signal (1 &mgr;s Period) having 1 &mgr;s period. The pulse signal (1 &mgr;s Period) is inputted to a frequency divider (
3
) and is converted into a pulse signal having 16 &mgr;s period.
Then, a self-refresh request control unit (
4
) receives a pulse signal (f16 &mgr;s) having a 16 &mgr;s period outputted from the frequency divider (
3
) and the self-refresh state signal (sref) produced by the self-refresh state control unit (
1
), and then produces a self-refresh request signal (selfreq) every 16 &mgr;s.
The self-refresh request signal (selfreq) is inputted to an internal row active control unit (
5
), refreshes cells corresponding to an internal address and increases the number of address by means of an internal address counter.
FIGS. 2
a
and
2
b
show timing charts for explaining the self-refresh operation of FIG.
1
.
FIG. 2
a
shows a situation where the cell data are destroyed owing to the decrease of the retention time of cell data in accordance with variations in temperature, voltage, manufacturing process and the like. As shown in
FIG. 2
a,
a refresh time of following cells becomes longer than the retention time of data, thereby causing data in the cells to be destroyed.
FIG. 2
b
shows a situation where the retention time of cell data is increased. In the conventional self-refresh mode as shown in
FIG. 1
, there are cells unnecessarily refreshed, thereby causing the unnecessary power consumption.
SUMMARY OF THE INVENTION
The present invention has been made in order to solve the problems encountered in the conventional art as mentioned above, and an object of the present invention is to provide a self-refresh apparatus for a semiconductor memory device capable of preventing the cell data from being destroyed owing to a leakage of the cell data caused by variations in temperature, voltage, manufacturing process and the like.
Another object of the present invention is to reduce an unnecessary refresh currents by performing a self-refreshing operation based on the actual data retention time of cell.
In order to achieve the above objects, the self-refresh apparatus for a semiconductor memory device according to an embodiment of the present invention comprises:
a monitor means for monitoring a leakage of memory cell data;
a self-refresh control means for producing a variable self-refresh signal in accordance with the output signal from the monitor means during a self-refresh mode; and
a refresh means for refreshing all of memory cells by producing a refresh request signal while the variable self-refresh signal is activated.
According to other embodiment of the present invention, the self-refresh apparatus for a semiconductor memory device comprises:
a monitor means for monitoring a leakage of memory cell data and outputting a refresh active signal;
a self-refresh control means for activating a self-refresh signal in response to the receipt of the refresh activating signal after entering into a self-refresh mode;
means for outputting a self-refresh request signal having a predetermined period while activating the self-refresh signal;
means for refreshing all of memory cells based on the self-refresh request signal; and
means for detecting the termination of refreshing over all of memory cells and providing the self-refresh, control means with a signal for deactivating the self-refresh signal.


REFERENCES:
patent: 4682306 (1987-07-01), Sakurai et al.
patent: 5272676 (1993-12-01), Kubono et al.
patent: 5392251 (1995-02-01), Manning
patent: 5404543 (1995-04-01), Faucher et al.
patent: 5680359 (1997-10-01), Jeong
patent: 5703823 (1997-12-01), Douse et al.

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