Self-reconfigurable parallel processor made from regularly-conne

Details Self-reconfigurable parallel processor made from regularly-conne Self-reconfigurable parallel processor made from regularly-conne

1997-05-05

1999-03-23

Santamauro, Jon

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 39, G06F 738, H03K 19177

Patent

active

058865373

ABSTRACT:
A parallel processing system composed of a regular array of programmable logic devices, each of which can be configured to perform any logical mapping from inputs to outputs. The configuration of each device is specified by a small program memory contained inside each device. Any device's program memory can be read or written by any other device connected to it within the array. This facilitates the development of extremely parallel systems whose configuration can be modified at runtime, while distributing control of the array throughout the entire array itself. The resulting system is thus completely self-reconfigurable, avoiding the bottlenecks and critical failure points found in inherently externally-configured systems.

REFERENCES:
patent: 4034356 (1977-07-01), Howley et al.
patent: 5450557 (1995-09-01), Kopp et al.
patent: 5473758 (1995-12-01), Allen et al.
patent: 5550782 (1996-08-01), Cliff et al.

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