Self power audit and control circuitry for microprocessor...

Details Self power audit and control circuitry for microprocessor... Self power audit and control circuitry for microprocessor...

1996-07-17

2004-08-31

Jean, Frantz B. (Department: 2155)

Electrical computers and digital processing systems: support

Computer power control

C713S320000, C713S322000, C713S324000, C713S340000

Reexamination Certificate

active

06785826

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates to an apparatus and method for reducing power dissipation in microprocessors and, in particular, to self power audit and control circuitry for microprocessor functional units.
BACKGROUND OF THE INVENTION
Limiting power dissipation is one of the major goals when designing a microprocessor. Microprocessor power dissipation has substantially increased with the advent of new semiconductor technologies, increased density and complexity, and higher clock speeds.
Prior attempts at limiting power dissipation have generally centered around a central control unit that enables/disables functional units. Traditionally, power controlling systems enable/disable functional units from a central control block.
FIG. 1
illustrates a prior art system
100
. The system
100
includes a centralized instruction dispatch unit
102
having a central power dissipation control unit
104
. The central power dissipation control unit
104
monitors usage of each functional unit
106
,
110
,
114
and
118
on an integrated circuit
198
. One way of controlling power dissipation is to disable the functional unit when not in use, or when the forecast of the next N operations does not indicate the functional unit will be used in the near future. This is accomplished via the respective enable/disable control lines
108
,
112
,
116
and
120
for the appropriate functional unit desired to be disabled. When the functional unit is required for operation or is forecast to be necessary, the enable/disable control lines are enabled to operate the functional unit. This method, therefore, does not measure or utilize the power dissipation of the functional unit to determine when, and if, the functional unit should be disabled to prevent possible damage to the functional unit by overheating, etc. Furthermore, functional units that are intensively used, however, may never be disabled. As such, this particular method is not very effective in controlling power dissipation in this context.
A more complex method counts the number of contiguous cycles that the functional unit has been operational. After a given number of cycles, the functional unit is disabled for a period of time to “cool off”. The number of contiguous cycles in operation may not be proportional to the power dissipation of the functional unit. Further, this method disables the functional unit for a defined period of time, thus, decreasing throughput of the functional unit.
In both of these methods, a central control unit monitors either forecasted usage requirements of the functional unit and/or tracks the number of contiguous cycles the functional unit is active. The only action taken by the central control unit is to disable the functional unit(s) via enable/control lines. As such, the central control unit itself must track all functional units.
Accordingly, there exists a need for an apparatus and method for self audit and control of power dissipation within a functional unit of a microprocessor. Further, there is needed an apparatus and method of internally determining power dissipation and selectively entering a low power mode of operation on a per functional unit basis to reduce power dissipation of the functional unit.
SUMMARY OF THE INVENTION
According to the present invention, there is provided a power audit and control circuit for monitoring power dissipation of a functional unit within a microprocessor. The power audit and control circuit includes a power sensing circuit located proximate the functional unit for measuring or estimating power dissipation of the functional unit. A low power mode identifying circuit receives the measured or estimated power dissipation of the functional unit and generates a low power mode enable signal when the measured or estimated power dissipation exceeds a predetermined amount. The power audit and control circuit further includes circuitry for controlling the power dissipation in the functional unit in response to the low power mode enable signal.
In accordance with the present invention, there is provided a method for reducing power dissipation in a microprocessor. The method includes the steps of measuring power dissipation of a functional unit within the microprocessor and comparing the measured power dissipation to a predetermined value. In response to the step of comparing, a low power mode enable signal is generated when the measured power dissipation exceeds the predetermined value. The power dissipation of the functional unit is thereafter controlled and/or reduced in response the low power mode enable signal.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and the specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.


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