Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
1999-04-15
2001-08-28
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S692000, C438S958000
Reexamination Certificate
active
06281127
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to methods used to fabricate semiconductor devices, and more specifically to a process used to fabricate a copper damascene structure, in an opening in an insulator layer.
(2) Description of the Prior Art
The ability of the semiconductor industry to use copper structures, in place of higher resistivity, aluminum counterparts, have allowed reductions in performance degrading RC delays to be realized. In addition, the ability to create dual damascene copper structures, comprised of copper interconnect structures, in an overlying, wide diameter opening in an insulator layer, as well as comprised of copper via structure, located in the underlying, narrow diameter opening, has reduced process complexity and cost, when compared to counterparts, in which individual patterning procedures are used for the metal interconnect and for the metal via structures. However to successfully fabricate damascene copper structures, procedures such as chemical mechanical polishing, (CMP), have to be used to remove copper from all regions, except from the copper residing in the damascene opening. The chemistry of the alumina slurry, used for CMP removal of unwanted copper, usually acidic, can however result in unwanted corrosion of the top surface of the damascene copper structure, as a result of the CMP procedure, or unwanted corrosion of exposed regions of the copper damascene structure can result from reactants used during subsequent insulator depositions.
This invention will describe novel procedures, used to reduce, or prevent, the extent of copper corrosion, resulting from the CMP procedure, or from a subsequent insulator deposition procedure. A first procedure is the ion implantation of boron ions, into a dual damascene, or damascene, copper structure, prior to implementing an over-polish cycle, of the CMP procedure, used to insure complete removal of unwanted regions of copper. The boron implantation procedure selectively creates a corrosion resistant, boron containing copper region, in a top portion of the copper damascene structure, which protects the exposed copper surface during subsequent processing procedures, such as the final, or CMP over-etch, cycle, as well as protecting from reactants, such as NH
3
or SiH
4
, used during a plasma enhanced chemical vapor deposition, (PECVD), procedure, used to deposit an overlying silicon nitride layer.
A second procedure, used to protect copper surfaces from finishing CMP cycles, or from the reactants used for deposition of subsequent insulator layers, is to form the opening, needed for the copper damascene structure, in a composite insulator layer, comprised of a borosilicate glass, (BSG), or a borophosphosilicate glass, (BPSG), layer, overlying a silicon oxide layer. After copper filling of the opening, the CMP procedure, after removing copper from the top surface of the BSG layer, will move boron from the exposed BSG layer, to the copper surface, exposed in the opening, forming the desired, boron containing region, in a top portion of the copper damascene structure. Prior art, such as Joshi et al, in U.S. Pat. No. 5,731,254, describe a process for forming a capping layer, for copper structures, via creation of a germanium-copper hard cap layer. However that prior art does not selectively place boron ions, in a top portion of the copper structure. A second prior art, Landers et al, in U.S. Pat. No. 5,676,587, describe the use of BSG, as a component of the composite insulator layer, in which the damascene type opening is formed in. However that prior art caps the BSG layer with a barrier layer. Therefore the subsequent CMP procedure never interfaces with the underlying BSG layer.
SUMMARY OF THE INVENTION
It is an object of this invention to form a copper damascene structure, in opening created in an insulator layer.
It is another object of this invention to create a corrosion protective, boron containing copper layer, in a top portion of the copper damascene structure, located in the opening an insulator layer, via ion implantation of boron ions, into a top portion of the copper damascene structure.
It is still another object of this invention to create an opening for the copper damascene structure, in a composite insulator layer, comprised of an overlying borosilicate glass, (BSG), layer, or of an overlying borophosphosilicate glass, (BPSG), layer, and comprised of an underlying silicon oxide layer.
It is still yet another object of this invention to form a corrosion protective, boron containing copper layer, in a top portion of a copper damascene structure, at the conclusion of the chemical mechanical polishing, (CMP), procedure, used to remove unwanted regions of copper, from the top surface of the BSG, or BPSG layer, via movement of boron, from the BSG or BPSG layer, to the surface of the copper damascene structure.
In accordance with the present invention, a process for forming a corrosion resistant, boron containing copper region, in a top portion of a copper damascene structure, has been developed. After creating an opening, in an insulator layer, to be used to accommodate the subsequent copper damascene structure, a barrier layer, and a copper seed layer are deposited, followed by copper filling of the damascene type opening, via chemical vapor deposition, (CVD), or via electroplating techniques. A first CMP procedure is used to remove unwanted regions of copper, and barrier layer, from the top surface of the insulator layer, resulting in a copper damascene structure, located in the damascene type opening. Prior to a final CMP procedure, used to insure complete removal of copper and barrier layer, from the top surface of the insulator layer, a boron ion implantation procedure is employed to create a boron containing, copper region, in a top portion of the copper damascene structure. The boron containing copper region, protects the copper damascene structure from subsequent corrosion initiating procedures, such as a final CMP procedure, a post CMP clean procedure, and subsequent CVD procedures.
Another iteration of this invention, forming a boron containing copper region, in a top portion of a copper structure, features the creation of the damascene type opening, in a composite insulator layer, comprised with an overlying BSG or BPSG layer. After depositing a barrier layer, and copper seed layer, the opening is filled with a CVD, or with an electroplated copper layer, followed by subjection to a first CMP procedure, removing copper and barrier layer, from the top surface of the BSG or BPSG layer. A second CMP procedure, used to insure complete removal of copper or barrier layer, results in movement of boron from the BSG or BPSG layer, to the copper damascene structure, resulting in a boron containing copper region, located in a top portion of the copper damascene structure.
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patent: 5693563 (1997-12-01), Teong
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patent: 5946567 (1999-08-01), Weng et al.
P. J. Ding et al., Annealing of boron-implanted corrosion resistant copper films, J.Appl. Phys. 74 (2), P-1331-1334, Jul. 1993.
Ackerman Stephen B.
Chen Kin-Chan
Saile George O.
Taiwan Semiconductor Manufacturing Company
Utech Benjamin L.
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