Electronic digital logic circuitry – Interface – Supply voltage level shifting
Patent
1997-04-11
1999-08-03
Santamauro, Jon
Electronic digital logic circuitry
Interface
Supply voltage level shifting
326 83, H03K 190185
Patent
active
059330260
ABSTRACT:
A low-power interface for nonvolatile writeable memory is described. The interface includes an input buffer and an output buffer. The input buffer receives input signals having one of a number of pairs of logic levels. The input buffer is coupled to the nonvolatile writeable memory and coupled to the same power supply as the nonvolatile writeable memory. The input buffer translates the input signals received to the signal level used by the nonvolatile writeable memory. The output buffer is coupled to the nonvolatile writeable memory and is coupled to a different power supply from the input buffer and the nonvolatile writeable memory. The output buffer translates the signals received from the nonvolatile writeable memory to the same signal levels as the input signal. The input buffer and output buffer utilize input/output signals having logic levels compatible with complementary metal-oxide semiconductor (CMOS) technology.
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Alexis Ranjeet
Landgraf Marcus E.
Larsen Robert E.
Pon Harry Q.
Talreja Sanjay
Intel Corporation
Phule Don
Santamauro Jon
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