Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2002-07-16
2004-01-06
Le, Don (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S027000, C326S083000
Reexamination Certificate
active
06674302
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a self-compensation circuit built in a chip for terminal resistors, especially to a self-compensation circuit built in a chip for terminal resistors referencing to an external resistor.
BACKGROUND OF THE INVENTION
The terminal resistors used for input/output ends can be generally classified into built-in and external terminal resistors. The external terminal resistors can be implemented by connecting discrete resistors externally.
FIG. 1
shows conventional external terminal resistors. A terminal resistor
2
a
with a voltage level pull-down function is coupled between an output end of a chip
1
a
and a transmission line
3
a
. The terminal resistors are essential for chips connected to high-speed buses. As the increase of the chip and the chip pin counts on the motherboard, it becomes more and more complicated for completing the layouts of terminal resistors
2
a
and the wiring of other devices under the restriction of area of the motherboard. Moreover, the total manufacturing costs for the motherboard will be more and more huge if additional discrete resistors are required on the motherboard. To solve the above-mentioned problem, terminal resistors composed of transistors and polysilicon resistors set inside the chip and coupled to input/output ends thereof are proposed.
FIG. 2
shows another conventional terminal resistors built in a chip. A terminal resistor
2
a
is a NMOS transistor within a chip
1
a
and with the voltage level pull-down function. The NMOS transistor has its source connected to the ground, its drain connected to the input/output end of the chip
1
a
and a transmission line
3
a
, and its gate connected to a gate voltage VG. When the NMOS transistor is turned on by the gate voltage VG, the NMOS transistor is functioned equivalent to a resistor and can be adopted as the terminal resistor
2
a
. However, the characteristic curve of the NMOS transistor for representing the equivalent resistance is nonlinear. Therefore, the equivalent resistance of the NMOS transistor is changed when the voltage on the transmission line
3
a
is changed, thus causing signals on the transmission line
3
a
to be more unstable than those of using discrete resistors.
FIG. 3
shows another conventional terminal resistor built in a chip. A terminal resistor
2
a
manufactured by the polysilicon resistor manufacturing technology is within a chip
1
a
and with a voltage level pull-down function. However, the resistance of the polysilicon terminal resistor
2
a
is sensitive to manufacturing variables. As this result, the resistances of the polysilicon terminal resistors
2
a
of different batches may vary in a range of 15%. Consequently, the resistances of terminal resistors
2
a
in different chips will not be kept to be approximately equal.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a self-compensation circuit built in chips for terminal resistors, therefore the resistance of the terminal resistor is with the better linear characteristic and able to be compensated by itself to reduce resistance differences.
It is another object of the present invention to provide a self-compensation circuit for terminal resistors within a chip, therefore the number of external resistors required is reduced to lower down total manufacturing costs and the difficulty of wiring other elements on the motherboard.
To achieve above object, the present invention provides a self-compensation circuit for terminal resistors, wherein the compensation circuit including a current mirror, a reference resistor, a comparator and a plurality of terminal resistors is for compensating internal terminal resistors with respect to external resistors. The current mirror provides a first current through the reference resistor to form a first voltage and a second current through an external resistor to provide a second voltage. The comparator compares the first voltage and the second voltage and generates a feedback voltage according to the difference of the first and second voltage. The feedback voltage will be used to control the resistance value of the reference resistor for equalizing the first and the second voltage. The feedback voltage is also used to control the resistance value of the terminal resistor to be equal or proportional to that of the external resistor.
The various objects and advantages of the present invention will be more readily understood from the following detailed description when read in conjunction with the appended drawing.
REFERENCES:
patent: 5254883 (1993-10-01), Horowitz et al.
patent: 5680060 (1997-10-01), Banniza et al.
patent: 6288564 (2001-09-01), Hedberg
patent: 6541996 (2003-04-01), Rosefield et al.
Le Don
Rosenberg , Klein & Lee
Via Technologies Inc.
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