Self compensating ROM circuit

Static information storage and retrieval – Read/write circuit – Differential sensing

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

365104, 365207, G11C 1140

Patent

active

045410771

ABSTRACT:
A compensation arrangement is shown for the diffused column line resistance in an N channel metal gate read only memory. The circuit employs a dummy column which has a transistor at each possible location operated from the same decoder that operates the metal gate rows. A current sense circuit clamps the column pull-up end of the dummy column line and provides a correction signal that is fed to the pull-up devices in the memory columns. A second current sense circuit clamps the dummy column sense amplifier end of the column line and provides a correction signal that can be used to compensate the reference currents in column sense amplifiers using differential current sensing.

REFERENCES:
patent: 4371956 (1983-02-01), Maeda et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Self compensating ROM circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self compensating ROM circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self compensating ROM circuit will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1432425

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.