Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2000-07-12
2002-04-16
Pham, Long (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
Reexamination Certificate
active
06372563
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the manufacture of semiconductor integrated circuits, and more particularly, to a self-aligned SOI device having a silicide gate and body contact.
As the push to include greater and greater device densities on a single integrated circuit continues, manufactures are looking for better or new opportunities to shrink device geometries. As device geometries decrease into deep submicron dimensions, the need for greater control and precision over the formation of thin, uniform, planar and low resistivity silicide contact layers increases. Attempts have been made to form silicide contact layers from a combination of a metal film with an amorphous as opposed to a crystalline substrate.
The silicidation process is the process of forming silicon-metal substances at the boundary between a layer of silicon and a metal layer. Amorphous silicon has also been known to react better than crystalline silicon with certain metals such as for example nickel. In deep submicron applications, therefore, the need to form self-aligned silicide gate structures becomes greater. What is lacking in the art is a structure and method for forming a self-aligned silicide gate SOI device, where the device also includes a body contact.
BRIEF SUMMARY OF THE INVENTION
In view of the above, a self-aligned SOI device and method for manufacturing same are provided. According to one aspect of the invention, a self-aligned SOI device with body contact and silicide gate is formed from ordinary substrate. An oxide layer, deposited over the ordinary substrate, is etched to provide a gate opening. An epitaxial layer is deposited over the gate opening, and a high K dielectric layer is deposited over the epitaxial layer. A self-aligned silicide gate contact, having at least one gate contact area, is disposed over the dielectric layer.
In another aspect of the invention, a method of making a self-aligned SOI device with body contact and silicide gate is provided. According to the steps of the method, an oxide layer is deposited over an ordinary substrate. The oxide layer is then etched to provide a gate opening. An epitaxial layer is deposited over the gate opening, and a high K dielectric layer is deposited over the epitaxial layer. A self-aligned silicide gate contact is formed over the dielectric layer where the gate contact includes at least one gate contact area.
The self-aligned SOI device with body contact and silicide gate can be easily manufactured according to the invention using an ordinary substrate such as silicon. These SOI devices are fully self-aligned transistors aligned throughout the isolation, source/drain and gate regions. Such devices, therefore, help provide for improved semiconductor densities.
These and other features and advantages of the invention will become apparent to those skilled in the art upon a review of the following detailed description of the presently preferred embodiments of the invention, taken in conjunction with the appended drawings.
REFERENCES:
patent: 4716128 (1987-12-01), Schubert et al.
patent: 4763183 (1988-08-01), Ng et al.
patent: 5494837 (1996-02-01), Subramanian et al.
patent: 5595923 (1997-01-01), Zhang et al.
patent: 5851890 (1998-12-01), Tsai et al.
patent: 5854509 (1998-12-01), Kunikiyo
patent: 5937315 (1999-08-01), Xiang et al.
patent: 6090691 (2000-07-01), Ang et al.
patent: 6198134 (2001-03-01), Inoue et al.
patent: 6204532 (2001-03-01), Gambino et al.
patent: 6225197 (2001-05-01), Maekawa
Erokhin et al, Article entitled, “Spatially Confined Nickle Disilcide Formation at 400°C On Ion Implantation Preamorphized Silicon”, 1993.
Wolf, Stanley “Silicon Processing For The VLSI Era, vol. 2” (Lattice Press), 1990, pp. 194 and 195.
Ghandi, Sorab K. “VLSI Fabrication Principles” (John Wiley & Sons), 1983, p. 437.
Krivokapic Zoran
Pramanick Shekhar
Advanced Micro Devices , Inc.
Coleman William David
Eschweiler & Associates LLC
Pham Long
LandOfFree
Self-aligned SOI device with body contact and NiSi2 gate does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Self-aligned SOI device with body contact and NiSi2 gate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-aligned SOI device with body contact and NiSi2 gate will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2907242