Self-aligned silicide manufacturing method

Details Self-aligned silicide manufacturing method Self-aligned silicide manufacturing method

1996-10-25

1999-04-13

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438656, 438657, 438664, H01L 2144

Patent

active

058937510

ABSTRACT:
An improved self-aligned silicide manufacturing method in which prior to the formation of a heat resistant metallic layer on top of a silicon substrate, a treatment of exposed surfaces of a gate terminal and source/drain diffusion regions is performed to increase surface roughness enabling an increase in crystallization nucleus number, as well as lowering crystallization temperature.

REFERENCES:
patent: 4983544 (1991-01-01), Lu et al.
patent: 5554566 (1996-09-01), Lur et al.
patent: 5571735 (1996-11-01), Mogami et al.
patent: 5593923 (1997-01-01), Horiuchi et al.
S. Wolf, "Silicon Processing for the VLSI Era, vol. 2", Lattice Press, pp. 147-149, 1990.

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