Self-aligned method for integrated circuit manufacture

Details Self-aligned method for integrated circuit manufacture Self-aligned method for integrated circuit manufacture

1975-04-30

1976-04-06

Rutledge, L. Dewayne

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

148 15, 148175, 357 91, H01L 21265

Patent

active

039486940

ABSTRACT:
A method for manufacturing integrated circuits provides total self-alignment of all critically positioned device regions. Self-alignment is accomplished by a combination of selectively etchable thin layers on the surface of a semiconductor body. An initially formed predetermined pattern of openings defines all active regions of the device. Selective introduction of impurities in sub-sets of this predetermined pattern form regions of a semiconductor device in a totally self-aligned manner while ion implantation through all overlying layers provides for the formation of further shallow device regions irrespective of the predetermined pattern of openings.

REFERENCES:
patent: 3595716 (1971-07-01), Kerr et al.
patent: 3704177 (1972-11-01), Beale
patent: 3783047 (1974-01-01), Paffen et al.
patent: 3789504 (1974-02-01), Jaddam
patent: 3793088 (1974-02-01), Eckton, Jr.

Affiliated with

Also associated with

Rating

Self-aligned method for integrated circuit manufacture does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self-aligned method for integrated circuit manufacture, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-aligned method for integrated circuit manufacture will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1574589