Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-06-12
2007-06-12
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257SE27060, C257SE21626, C257SE21640
Reexamination Certificate
active
10904391
ABSTRACT:
A CMOS structure in which the gate-to-drain/source capacitance is reduced as well as various methods of fabricating such a structure are provided. In accordance with the present invention, it has been discovered that the gate-to-drain/source capacitance can be significantly reduced by forming a CMOS structure in which a low-k dielectric material is self-aligned with the gate conductor. A reduction in capacitance between the gate conductor and the contact via ranging from about 30% to greater than 40% has been seen with the inventive structures. Moreover, the total outer-fringe capacitance (gate to outer diffusion+gate to contact via) is reduced between 10–18%. The inventive CMOS structure includes at least one gate region including a gate conductor located atop a surface of a semiconductor substrate; and a low-k dielectric material that is self-aligned to the gate conductor.
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Belyansky Michael P.
Doris Bruce B.
Gluschenkov Oleg
Mandelman Jack A.
Budd Paul
International Business Machines - Corporation
Jackson Jerome
Schnurmann H. Daniel
Scully , Scott, Murphy & Presser, P.C.
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