Self-aligned lightly doped drain recessed-gate thin-film...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S347000, C257SE29267, C257SE29278, C257SE29286

Reexamination Certificate

active

07872309

ABSTRACT:
A recessed-gate thin-film transistor (RG-TFT) with a self-aligned lightly doped drain (LDD) is provided, along with a corresponding fabrication method. The method deposits an insulator overlying a substrate and etches a trench in the insulator. The trench has a bottom and sidewalls. An active silicon (Si) layer is formed overlying the insulator and trench, with a gate oxide layer over the active Si layer. A recessed gate electrode is then formed in the trench. The TFT is doped and LDD regions are formed in the active Si layer overlying the trench sidewalls. The LDD regions have a length that extends from a top of the trench sidewall, to the trench bottom, with a doping density that decreases in response to the LDD length. Alternately stated, the LDD length is directly related to the depth of the trench.

REFERENCES:
patent: 5670398 (1997-09-01), Yin et al.
patent: 5937283 (1999-08-01), Lee
patent: 6031261 (2000-02-01), Kang
patent: 6107662 (2000-08-01), Kim
patent: 2005/0202605 (2005-09-01), Koyama

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