Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Patent
1997-07-30
1999-09-07
Bowers, Charles
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
438694, 438695, 438703, 438706, 438709, 438711, 438723, 438724, 438725, 438761, H01L 213065
Patent
active
059487011
ABSTRACT:
A method for forming a via through a dielectric layer within a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed upon the substrate a pair of microelectronic structures. There is then formed sequentially upon the substrate including the pair of microelectronic structures a first conformal dielectric layer followed by a second conformal dielectric layer followed by a third dielectric layer, where the second conformal dielectric layer serves as an etch stop layer with respect to the third dielectric layer in a first plasma etch method employed in forming in part a via through the third dielectric layer, the second conformal dielectric layer and the first conformal dielectric layer at a location between the pair of microelectronic structures. The first plasma etch method employs an etchant gas composition which forms a passivating fluorocarbon polymer layer upon non-horizontal portions of the third dielectric layer, the second conformal dielectric layer and the first conformal dielectric layer. There is then formed upon the third dielectric layer a patterned photoresist layer which defines the location between the pair of structures to be formed the via through the third dielectric layer, the second conformal dielectric layer and the first conformal dielectric layer. There is then etched through the first plasma etch method the third dielectric layer and the second conformal dielectric layer to form a partial via while forming the passivating fluorocarbon polymer layer upon non-horizontal portions of the third dielectric layer, the second conformal dielectric layer and the first dielectric layer. Finally, there is then etched through a second plasma etch method the first conformal dielectric layer to form the via through the third dielectric layer, the second conformal dielectric layer and the first conformal dielectric layer.
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Chooi Simon
Li Jian Xun
Zhou Mei-Sheng
Bowers Charles
Chartered Semiconductor Manufacturing Ltd.
Nguyen Thanh
Pike Rosemary L. S.
Saile George O.
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