Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1995-11-14
1998-03-24
Wilczewski, Mary
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438593, 438595, 438637, 438211, H01L 2182
Patent
active
057312427
ABSTRACT:
The encapsulation of gate stacks of a semiconductor device in an oxide insulative layer and in a silicon nitride etch-stop layer allows the formation of a contact filling for connection to underlying diffusion regions without risk of accidental diffusion contact to gate shorts created by the contact filling. As a result, the gate stacks may be patterned closer together, thus reducing the cell size and increasing the cell density. Furthermore, use of the etch-stop layer makes contact lithography easier since the size of the contact opening can be increased and contact alignment tolerance made less stringent without concern of increasing the cell size or of creating diffusion contact to gate shorts.
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Atwood Gregory E.
Parat Krishna K.
Tang Daniel N.
Wada Glen N.
Intel Corporation
Wilczewski Mary
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