Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2005-04-12
2005-04-12
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S634000, C438S723000, C438S724000, C438S743000, C438S744000, C438S756000, C438S757000
Reexamination Certificate
active
06878612
ABSTRACT:
A semiconductor device manufacturing method that assures required size of flat areas at a wiring overlay nitride film, and forms an SAC structure wherein selectivity is not lowered at corners. A first etching process wherein an insulating film is etched under conditions for forming a vertical opening (vertical conditions) is used to open up the insulating film to a point near the wiring overlay nitride film 105. A second etching process is used wherein the insulating film is opened until the wiring overlay nitride film becomes exposed, by etching under conditions assuring a high ratio of selectivity relative to the wiring overlay nitride film (SAC conditions). Then, a third etching process is used wherein the insulating film located between first and second electrodes is removed by etching under conditions with a low ratio of selectivity relative to the wiring overlay nitride film (SAC conditions).
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Nagao Takeshi
Yabata Atsushi
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