Self-aligned barrier process with antiblooming drain for advance

Details Self-aligned barrier process with antiblooming drain for advance Self-aligned barrier process with antiblooming drain for advance

1998-02-17

1999-10-26

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

Responsive to electromagnetic radiation

438146, H01L 21339

Patent

active

059727330

ABSTRACT:
A method for making a virtual phase charge coupled device includes: forming a semiconductor region 24; forming a gate insulator layer 26 over the semiconductor region 24; forming a semiconductor layer over the gate insulator layer 26; forming first, second, and third openings in the semiconductor layer; implanting antiblooming barrier implants 36 in the semiconductor region 24 through the first opening; implanting virtual barrier implants 42 in the semiconductor region through the second opening; implanting clocked barrier implants 46 in the semiconductor region 24 through the third opening; forming semiconductor fillings in the first, second, and third openings; etching the semiconductor layer and semiconductor fillings to form clocked gates 28 and 30 and an antiblooming gate 32; implanting an antiblooming drain 48 aligned to the antiblooming gate 32; and implanting virtual gates 56, 58, and 60 aligned to the clocked gates 28 and 30 and the antiblooming gate 32.

REFERENCES:
patent: 4173064 (1979-11-01), Farnow
patent: 4994875 (1991-02-01), Hynecek
patent: 5118631 (1992-06-01), Dyck et al.
patent: 5151380 (1992-09-01), Hynecek
patent: 5453632 (1995-09-01), Hynecek et al.
patent: 5585298 (1996-12-01), Stevens et al.

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