Self adjusting delay circuit and method for compensating sense a

Details Self adjusting delay circuit and method for compensating sense a Self adjusting delay circuit and method for compensating sense a

1997-07-09

1999-08-10

Nelms, David

Static information storage and retrieval

Read/write circuit

Differential sensing

365205, 365207, 327 52, G11C 702

Patent

active

059369051

ABSTRACT:
A circuit technique that optimizes the activation timing of a dynamic sense amplifier includes a circuit that closely tracks process variations to generate the optimum activation signal for the dynamic sense amplifier. In another embodiment, the activation timing for the dynamic sense amplifier is made programmable on a chip-by-chip basis to not only arrive at the optimal timing for the activation signal, but to also enable the manufacturer to guarantee a certain amount of margin in the operation of the circuit.

REFERENCES:
patent: 4425633 (1984-01-01), Swain
patent: 4804871 (1989-02-01), Walter, Jr.
patent: 5132932 (1992-07-01), Tobita
patent: 5424985 (1995-06-01), McClure et al.
patent: 5650971 (1997-07-01), Longway et al.
patent: 5682353 (1997-10-01), Eitan et al.

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