Selectively processing different size data in multiplier and...

Electrical computers and digital processing systems: processing – Processing control – Arithmetic operation instruction processing

Reexamination Certificate

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Details

C708S518000, C708S524000, C712S035000

Reexamination Certificate

active

06725360

ABSTRACT:

TECHNICAL FIELD
This invention relates to digital signal processors, and more particularly to digital signal processors for processing reduced data sizes.
BACKGROUND
Digital signal processing is concerned with the representation of signals in digital form and the transformation or processing of such signal representation using numerical computation. Digital signal processing is a core technology for many of today's high technology products in fields such as wireless communications, networking, and multimedia. One reason for the prevalence of digital signal processing technology has been the development of low cost, powerful digital signal processors (DSPs) that provide is engineers the reliable computing capability to implement these products cheaply and efficiently. Since the development of the first DSPs in the early 1980's, DSP architecture and design have evolved to the point where even sophisticated real-time processing of video-rate sequences can be performed.
Typically, DSPs are constructed of a fixed size. The size of a DSP is selected based on the maximum size of the data to be processed. For example, a DSP that will be used to process 16 bit data needs multipliers and accumulators of a specific size to ensure that the data is processed correctly.
While these DSPs can process data having less than 16 bits, doing so causes a portion of the DSP hardware to remain unused. This decreases the efficiency of the DSP.


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