Selectively deposited PGO thin film and method for forming same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S295000, C257S296000

Reexamination Certificate

active

06825519

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally relates to integrated circuit (IC) ferroelectric thin film processes and, more particularly, to selectively deposited PGO thin films suitable for use with ferroelectric non-volatile memory devices.
2. Description of the Related Art
Ferroelectric-gate controlled devices, such as metal-ferroelectric-silicon field-effect transistor (MFS FET), were studied as early as the 1950s. In recent years, ferroelectric-gate controlled memory transistors have attracted much attention for high-density nonvolatile memory applications. Two kinds of device structures, Metal-Ferroelectric-Insulator-Silicon (MFIS) FET and Metal-Ferroelectric-Metal-Oxide-Silicon (MFMOS) FET, have been fabricated thus far. The ferroelectric Pb
3
Ge
5
O
11
(PGO) thin films have a smaller polarization, a relatively large coercive field, and a lower dielectric constant. Therefore, PGO is a prime candidate for one-transistor memory applications. Extremely high c-axis oriented PGO thin films can be deposited on Pt and Ir metals, and working 1T-memory devices with PGO MFMOS memory cells have been fabricated. Even so, high quality IT devices with good retention properties have been found to be difficult to fabricate. The problems result from the poor quality of; the ferroelectric thin films, the leakage current of IT devices, and the trapped charges in ferroelectric and oxide capacitors. These integration-induced damages are largely the result of PGO etching processes.
It would be advantageous if ferroelectric capacitors, suitable for use in 1T memory applications, could be fabricated with Ir or Pt electrodes.
It would be advantageous if the PGO memory material overlying a metal electrode could be formed without an etching process.
SUMMARY OF THE INVENTION
The present invention introduces a selective deposition technology for the formation of c-axis PESO thin films on Ir and Pt metals, to improve the integration process of PGO MFMOS transistor ferroelectric memory devices.
Accordingly, a method is provided for selectively forming a Pb
5
Ge
3
O
11
(PGO) thin film memory device. The method comprises: forming a silicon (Si) substrate; forming a silicon oxide film overlying the substrate; forming a patterned bottom (Electrode overlying the silicon oxide film; selectively depositing a PGO film overlying the bottom electrode; annealing; and, forming a top electrode overlying the PGO film.
Selectively depositing a PGO film overlying the bottom electrode includes: depositing a seed layer of PGO; and, forming a c-axis oriented PGO layer overlying the seed layer.
Additional details of the above-described method, including the preparation of the PGO precursor, the PGO seed layer and c-axis PGO layer deposition processes, as well as devices from the selective deposition of PGO films are provided below.


REFERENCES:
patent: 6190925 (2001-02-01), Li et al.
patent: 2003/0234412 (2003-12-01), Yamanobe
Tingkai Li, Sheng Teng Hsu, Bruce Ulrich, Hong Ying, Lisa Stecker, Dave Evans, Yoshi Ono, Jer-shen Maa and J.J.Lee “Fabrication and Characterization of Pb5Ge3O11One-transistor-memory Device” Appl. Phys. Lett. 79 (11) 1661 (Jan. 2001).
Tingkai Li, Fengyan Zhang and Sheng Teng Hsu, “The Ferroelectric Properties of c-axis Oriented Pb5Ge3O11Thin Films Prepared by Metalorganic Chemical Vapor Deposition” Appl. Phys. L tt. 74 (2) 296 (Jan. 1999).

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