Selectively controllable gas feed zones for a plasma reactor

Details Selectively controllable gas feed zones for a plasma reactor Selectively controllable gas feed zones for a plasma reactor

2001-11-20

2003-07-08

Wong, Don (Department: 2821)

Electric lamp and discharge devices: systems

Discharge device load with fluent material supply to the...

Plasma generating

C313S231310, C034S258000, C118S72300R

Reexamination Certificate

active

06590344

ABSTRACT:

FIELD OF THE INVENTION
This invention generally relates to a gas feed system for a plasma CVD and/or etching apparatus and more particularly to a gas feed system including selectively controllable zones.
BACKGROUND OF THE INVENTION
In semiconductor fabrication, various layers of insulating material, semiconducting material and conducting material are formed to produce a multilayer semiconductor device. The layers are patterned to create features that taken together, form elements such as transistors, capacitors, and resistors. These elements are then interconnected to achieve a desired electrical function, thereby producing an integrated circuit (IC) device. The formation and patterning of the various device layers are achieved using conventional fabrication techniques, such as oxidation, implantation, deposition, epitaxial growth of silicon, lithography, etching, and planarization.
While there are many methods for depositing material in VLSI and ULSI technology, these methods maybe broadly classified into chemical vapor deposition (CVD) and physical vapor deposition (PVD). CVD is defined as the formation of a nonvolatile solid film on a substrate by the reaction of vapor phase reactants that contain the required chemical constituents of the solid film. The most common CVD deposition methods are atmospheric pressure CVD (APCVD), low pressure CVD (LPCVD), and plasma enhanced CVD (PECVD). PECVD is a preferred method where lower temperatures are required.
The CVD process includes, among other reaction steps, transport of the reactants to the surface of the substrate and reaction at the substrate surface. Depending on process parameters such as temperature and pressure, the deposition rate is primarily affected by parameters that affect the slowest reaction step and is frequently classified as either reaction limited or mass transport limited. However, even if the deposition rate is reaction limited, the surface reaction rate is affected by local non uniformities in gas phase reactant concentrations resulting in depletion non-uniformities and consequently film non-uniformities. On the other hand, if the deposition rate is mass-transport limited, it is crucial that the flux of gas phase reactant to the surface is uniform across the deposition substrate, for example, a semiconductor wafer. Thus, in either case uniformity in gas phase concentrations over the deposition substrate affects film uniformity.
For example, PECVD uses RF power to generate a glow discharge (plasma) thereby imparting energy to the reactants, allowing the deposition to occur at a lower temperature compared to APCVD or LPCVD depositions. As a result, PECVD depositions are generally reaction limited. Generally, free electrons are generated under the influence of RF energy and are accelerated by an electric field to collide with gas phase molecules thereby creating ions which may in turn be accelerated toward the substrate where they adsorb and rearrange to form a deposited solid film.
As feature geometries shrink, uniform CVD film deposition is increasingly important and more difficult to achieve. For example, gap filling performance is an increasingly significant issue. Gap fill performance generally refers to the ability of a process to fill an etched feature opening, for example, trenches between metal lines. A process known as HDP-CVD is increasingly used since the plasma may be used for both CVD process and etching, allowing both process to be used to achieve critical dimension control of semiconductor features. Generally, both process take place simultaneously, resulting in a deposition/sputter ratio (D/S/) ratio that may be adjusted according to process parameters. In HDP-CVD, a bias power is coupled to the substrate to attract ions which sputter (etch) the substrate during deposition, thereby preventing a phenomena known as crowning where the deposition material converges over the trench before the trench is completely filled with the deposition material. The deposition rate may therefore be more finely tuned to improved CVD deposition properties to, for example, avoid crowning.
As wafer sizes increase, etch/deposition uniformity has become increasingly harder to achieve in plasma reactors, for example, PECVD or HDP-CVD reactors. Nonuniformity in etching and deposition is typically exhibited across the diameter of process wafer with the greatest differences at the center and at the edges (circumference) of the process wafer. Consequently, semiconductor features exhibit asymmetric dimensions caused by etching or deposition non-uniformities. One example where asymmetric etching or deposition can have debilitating effects on device performance is, for example, in the manufacture of gate structures where gate oxide thickness and gate length dimensions are critical for proper device performance. In many cases, no more than a few nanometers of nonuniformity (critical dimension bias) across an individual device can be tolerated.
According to the prior art, efforts to address etch/deposition nonuniformity have focused on adjusting the power level of the RF power antenna (excitation source), for example, in an inductively coupled plasma source, a single or dual TCP (transformer coupled plasma), typically disposed outside the reactor chamber adjacent to a dielectric window through which power is transmitted to the reactor gases. In addition, efforts have been made to gain better control of the substrate temperature, for example, by including a dual temperature control on the electrostatic chuck (ESC) that holds the substrate.
It has been found, however, that the gas transport characteristics within a plasma reactor are the most sensitive variable contributing to etch/deposition non-uniformities. There have been a variety of gas feed systems proposed for plasma reactors however, many of them have unacceptable shortcomings. For example, U.S. Pat. No. 5,522,934 to Suzuki et al. discloses a gas injector arrangement including a plurality of gas supply nozzles positioned in a plurality of levels in a direction substantially perpendicular to the substrate. The gas supply nozzles at upper levels extend further toward the center of the substrate than those at lower levels. The injection holes are located at the distal ends of the gas supply nozzles. These systems are effective in delivering the process gas to the region above the substrate. However, because the conduits extend over the substrate surface between the substrate and the primary ion generation region, as the ions diffuse from the generation region toward the substrate the conduits can cast shadows of ion nonuniformity onto the substrate surface. This can lead to an undesirable loss in etch and deposition uniformity.
In addition, other gas feed systems for plasma reactors have included top gas feed arrangement where the gas feed is fed from the top of the reactor chamber toward the substrate surface. Further, arrangements have included, for example, gas feeds centrally located at the top of the chamber including shower head feed arrangements. Further, the prior art has disclosed gas feeds that are centrally located in the upper chamber including one or more gas feeds and which can be directed at a variety of angles generally toward the substrate surface. Gas feed systems according to the prior art, however, lack a system to readily adjust the gas feed characteristics selectively over an area including the full diameter of the process wafer. For example, centrally located adjustable angle gas feed systems including a plurality of adjustable orifices present problems by creating complex patterns of interfering streams of gas thereby creating convective transport non-uniformities between the central portion of the process wafer and the peripheral portion. In addition non-uniformities over the diameter of the process wafer may be created since proper reactant mixing has not fully occurred.
There is therefore a need in the semiconductor processing art to develop adjustable gas feed systems whereby gas transport conditions for a plasma reactor including CVD or etching

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