Selective program voltage ramp rates in non-volatile memory

Details Selective program voltage ramp rates in non-volatile memory Selective program voltage ramp rates in non-volatile memory

2007-10-02

2008-11-04

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S189011

Reexamination Certificate

active

07447086

ABSTRACT:
A non-volatile memory system is programmed so as to reduce or avoid program disturb. In accordance with one embodiment, multiple program inhibit schemes are employed for a single non-volatile memory system. Program inhibit schemes are selected based on the word line being programmed. Certain program inhibit schemes have been discovered to better minimize or eliminate program disturb at select word lines. In one embodiment, selecting a program inhibit scheme includes selecting a program voltage pulse ramp rate. Different ramp rates have been discovered to better minimize program disturb when applied to select word lines. In another embodiment, the temperature of a memory system is detected before or during a program operation. A program inhibit scheme can be selected based on the temperature of the system.

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