Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material
Reexamination Certificate
2002-12-09
2004-02-03
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
C438S624000, C438S627000, C438S597000, C438S257000, C438S652000, C438S653000
Reexamination Certificate
active
06686263
ABSTRACT:
FIELD OF INVENTION
The present invention relates generally semiconductor fabrication and, in particular, to systems and methods of forming electroless conductive layers in semiconductor polymer memory devices.
BACKGROUND OF THE INVENTION
The volume, use and complexity of computers and electronic devices are continually increasing. Computers consistently become more powerful, new and improved electronic devices are continually developed (e.g., digital audio players, video players). Additionally, the growth and use of digital media (e.g., digital audio, video, images, and the like) have further pushed development of these devices. Such growth and development has vastly increased the amount of information desired/required to be stored and maintained for computer and electronic devices.
Generally, memory devices are employed in computer and electronic devices to store and maintain this information. Memory devices are typically formed on a semiconductor material such as silicon via a plurality of semiconductor fabrication processes such as layering, doping, heat treatments and patterning. Layering is an operation that adds thin layers to the wafer surface. Layers can be, for example, insulators, semiconductors and/or conductors and are grown or deposited via a variety of processes. Some common deposition techniques are chemical vapor deposition (CVD), evaporation and sputtering. Doping is the process that adds specific amounts of dopants to the wafer surface. The dopants can cause the properties of layers to be modified (e.g., change a semiconductor to a conductor). A number of techniques, such as thermal diffusion and ion implantation can be employed for doping. Heat treatments are another basic operation in which a wafer is heated and cooled to achieve specific results. Typically, in heat treatment operations, no additional material is added or removed from the wafer, although contaminates and vapors may evaporate from the wafer. One common heat treatment is annealing, which repairs damage to crystal structure of a wafer/device generally caused by doping operations. Other heat treatments, such as alloying and driving of solvents, are also employed in semiconductor fabrication.
Generally, a memory device includes arrays of memory cells, wherein each memory cell can be accessed or “read”, “written”, and “erased” with information. The memory cells maintain information in an “off” or an “on” state (e.g., are limited to 2 states), also referred to as “0” and “1”. To store this information, a memory cell includes a capacitor structure having a top electrode, also referred to as a cell plate, a bottom electrode, also referred to as a storage node, and a charge holding material (e.g., oxide, oxide
itride/oxide (ONO), . . . ) formed in between the top electrode and the bottom electrode. The top electrode and the bottom electrode are formed of a conductive material. This capacitor permits storage of a charge that allows the memory cell to store a single bit of information. Such memory cells typically employ a refresh signal to maintain the charge on the capacitor and thus, their information. Some examples of memory devices that employ such a capacitor are dynamic random access memory (DRAM), double data rate memory (DDR), flash memory, metal oxide semiconductor field effect transistor (MOSFET), and the like.
However, formation of the electrodes, particular the top electrode via conventional semiconductor fabrication processes is problematic. The conventional processes utilized to form the electrodes generally involve high temperatures and/or electroplating. These high temperatures, particularly for some chemistries, can damage previously formed components of the memory devices. Similarly, employing technologies such as electroplating also poses a significant risk of damaging previously formed components of the memory devices. Electroplating is a process for depositing metal by utilizing electrolysis with an aqueous metal salt solution. In a typical electroplating setup, two electrodes are immersed in a plating solution, such as a sample wafer and a counter electrode. Current is then supplied by an external power supply, and positively charged metal ions flow to the negatively charged cathode where they acquire electrons and deposit in the form of a metal film. Thus, when the wafer is charged negatively and the counter electrode positively, electroplating occurs. However, deposition occurs only on electrically contacted areas on a wafer. More importantly, the flow of electrons and ions can easily damage the already formed portions of the memory device. Thus, conventional technologies for forming electrodes can damage memory devices. The forming of the top electrode can be especially problematic because a substantial portion of the device has already been formed.
SUMMARY OF THE INVENTION
The following is a summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not intended to identify key/critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention relates generally semiconductor fabrication and, in particular, to systems and methods of forming electrodes at relatively low temperatures.
The present invention facilitates forming electrodes at low temperatures and mitigating memory element decomposition. An electroless plating process is employed that operates at relatively low temperatures, without employing electrical current. The electroless process is utilized to form conductive layers, such as electrodes and the like, from conductive materials. The process includes depositing an activation compound on selected areas and then applying a chemical solution, which contains a reducing agent and metal ions. Then, a chemical reaction occurs reducing the metal ions and thereby plating the metal ions and forming a conductive layer. The conductive layer formed by the present invention (e.g., electrode) can be utilized in organic memory devices.
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Lopatin Sergey D.
Ngo Minh Van
Advanced Micro Devices , Inc.
Amin & Turocy LLP
Pham Long
LandOfFree
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