Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-04-12
2011-04-12
Bragdon, Reginald G (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S138000, C711SE12021, C711SE12026, C345S503000
Reexamination Certificate
active
07925836
ABSTRACT:
A data processing system is provided with a general purpose programmable processor and an accelerator processor. Coherency control circuitry manages data coherence between data items which may be stored within a cache memory and/or a further memory. Memory access requests from the accelerator processor are received by a memory request switching circuitry which is responsive to a signal from the accelerator processor to direct the memory access request either via coherency control circuit or directly to the further memory.
REFERENCES:
patent: 2007/0226424 (2007-09-01), Clark et al.
Sorgard Edvard
Stevens Ashley Miles
ARM Limited
Bragdon Reginald G
Cardwell Eric S
Nixon & Vanderhye P.C.
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