Selective cleaning process for fabricating a semiconductor devic

Details Selective cleaning process for fabricating a semiconductor devic Selective cleaning process for fabricating a semiconductor devic

1994-12-27

1995-12-26

Powell, William

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

134 3, 1566451, 1566561, 216 38, 216 52, 216 88, 252 793, 252 794, H01L 2100

Patent

active

054784360

ABSTRACT:
A selective cleaning process for fabricating a semiconductor device includes the steps of processing a semiconductor substrate (10) and introducing metal contaminants (22) by contacting the semiconductor substrate (10) with a polishing slurry during a polished planarization process. The metal contaminants (22) are removed by applying a cleaning solution including an organic solvent and a compound containing fluorine. The chemical constituents of the cleaning solution are substantially unreactive with metal interconnect material (12) underlying dielectric layers (18) present on the semiconductor substrate (10). The preferred cleaning solution comprises an aqueous solution of ethylene glycol and ammonium fluoride.

REFERENCES:
patent: 5112437 (1992-05-01), Watanabe et al.
D. S. Herman et al., "Multilayer Metallization Processes for CMOS FET Devices", The Electrochemical Society, May 9-13, 1971, pp. 166-169.
Advanced Chemical Systems International, Inc. (ACSI), Technical Document 005.1, Date Unknown, pp. 1-14.
Advanced Chemical Systems International, Inc. (ACSI), Data Sheet 021.2, Noe Etch, Date Unknown, p. 2.

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