Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2005-03-29
2005-03-29
Ellis, Richard L. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Branching
C712S234000, C711S220000
Reexamination Certificate
active
06874081
ABSTRACT:
A link address/sequential address generation circuit is provided for generating a link/sequential address. The circuit receives the most significant bits of at least two addresses: a first address of a first set of bytes including a branch instruction and a second address of a second set of bytes contiguous to the first set. The least significant bits of the branch PC (those bits not included in the most significant bits of the addresses received by the circuit) are used to generate the least significant bits of the link/sequential address and to select one of the first address and the second address to supply the most significant bits.
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Kruckemyer David A.
Murray Daniel C.
Broadcom Corporation
Ellis Richard L.
Garlick Harrison & Markison LLP
Huisman David J.
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