Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2008-07-15
2008-07-15
Dollinger, Tonia L. M. (Department: 2181)
Electrical computers and digital processing systems: processing
Processing control
Branching
Reexamination Certificate
active
11092984
ABSTRACT:
Following execution of a subroutine, a return instruction is executed having an address as an input operand thereto. This input operand is compared with one or more predetermined values to detect a match and the return instruction response is selected in dependence upon whether or not a match is detected. Thus, the return address value can be used to invoke differing return instruction responses, such as an exception return response or a procedure return response. The one or more predetermined addresses may be conveniently allocated to the highest memory addresses within the memory map.
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J. Losq, “Subroutine Return Stack”IBM Technical Disclosure Bulletin,vol. 24, No. 7A, Dec. 1981, pp. 3255-3258.
Grisenthwaite Richard Roy
Kimelman Paul
Seal David James
Arm Limited
Dollinger Tonia L. M.
Geib Benjamin
Nixon & Vanderhye P.C.
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