Seimiconductor memory device having sub bit lines

Details Seimiconductor memory device having sub bit lines Seimiconductor memory device having sub bit lines

1987-04-20

1989-02-21

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Differential sensing

365 51, G11C 702, G11C 502

Patent

active

048071943

ABSTRACT:
A dynamic random access memory includes a memory cell array, sense amplifiers disposed at both sides of the memory cell array, and sub bit lines coupled to the sense amplifiers. The sub bit lines may be coupled to data busses through middle amplifiers. By use of such a memory architecture, a higher integration of a DRAM can be realized. Also, the handling of super large bit data, i.e. more than 1024 bits becomes possible.

REFERENCES:
patent: 4700328 (1987-10-01), Burghard

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