Segmented pillar layout for a high-voltage vertical transistor

Details Segmented pillar layout for a high-voltage vertical transistor Segmented pillar layout for a high-voltage vertical transistor

2009-01-20

2010-10-19

Pizarro, Marcos D. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S335000, C257S488000, C257SE29260, C257SE29262

Reexamination Certificate

active

07816731

ABSTRACT:
In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor segments in the first and second sections includes a pillar of a semiconductor material that extends in a vertical direction. First and second dielectric regions are disposed on opposite sides of the pillar. First and second field plates are respectively disposed in the first and second dielectric regions. Outer field plates of transistor segments adjoining first and second sections are either separated or partially merged. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.

REFERENCES:
patent: 6787848 (2004-09-01), Ono et al.
patent: 2003/0209757 (2003-11-01), Henninger et al.
patent: 2005/0167749 (2005-08-01), Disney

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