Segmented MRAM memory array

Static information storage and retrieval – Addressing – Current steering

Reexamination Certificate

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C365S171000, C365S175000

Reexamination Certificate

active

10780171

ABSTRACT:
In one example, an MRAM memory array includes a plurality of word lines, a plurality of bit lines crossing the word lines, and a plurality of first and second diodes, and magnetic tunnel junction memories. Each first diode includes a cathode, and an anode coupled to each bit line. Each second diode includes an anode, and a cathode coupled to each word line. The magnetic tunnel junction memories include a pinned layer, a free layer, and a non-magnetic layer. The non-magnetic layer is located between the pinned layer and the free layer. Each diode is positioned at crossing points of the bit lines and the word lines and connected between the first diode at the corresponding crossing bit line and the second diode at the corresponding crossing word line.

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English machine translation for JP2003208785 retrieved from PAJ.

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