Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2011-03-22
2011-11-15
Choe, Yong (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711SE12093, C713S190000, C365S129000
Reexamination Certificate
active
08060717
ABSTRACT:
The various embodiments of the invention relate generally to semiconductors and memory technology. More specifically, the various embodiment and examples of the invention relate to memory devices, systems, and methods that protect data stored in one or more memory devices from unauthorized access. The memory device may include third dimension memory that is positioned on top of a logic layer that includes active circuitry in communication with the third dimension memory. The third dimension memory may include multiple layers of memory that are vertically stacked upon each other. Each layer of memory may include a plurality of two-terminal memory elements and the two-terminal memory elements can be arranged in a two-terminal cross-point array configuration. At least a portion of one or more of the multiple layers of memory may include an obfuscation layer configured to conceal data stored in one or more of the multiple layers of memory.
REFERENCES:
patent: 5825878 (1998-10-01), Takahashi et al.
patent: 6879340 (2005-04-01), Chevallier
patent: 7080039 (2006-07-01), Marsh
patent: 2007/0044160 (2007-02-01), Ishibashi
Choe Yong
Unity Semiconductor Corporation
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