Secure memory management unit which utilizes a system processor

Details Secure memory management unit which utilizes a system processor Secure memory management unit which utilizes a system processor

1997-10-08

1999-12-14

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

380 4, G06F 1200

Patent

active

060031174

ABSTRACT:
An integrated circuit accesses encrypted data stored in an external memory, the integrated circuit includes a main memory for storing decrypted data. A processor within the integrated circuit utilizes the decrypted data in the main memory. A soft secure memory management unit (SMMU), within the integrated circuit, monitors data accesses by the processor. The soft SMMU signals the processor when the processor attempts to access first data which is not within the decrypted data in the main memory but is within the encrypted data stored in the external memory. When the soft SMMU signals the processor, the processor oversees transfer of the first data from the external memory and oversees decryption of the first data.

REFERENCES:
patent: 4847902 (1989-07-01), Hampson
patent: 5214697 (1993-05-01), Saito
patent: 5249232 (1993-09-01), Erbes et al.
patent: 5825878 (1998-10-01), Takahashi et al.

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