Secure digital host sector application flag compression

Details Secure digital host sector application flag compression Secure digital host sector application flag compression

2007-06-29

2010-12-28

Thai, Tuan V. (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S100000, C711S154000

Reexamination Certificate

active

07861046

ABSTRACT:
A memory apparatus and method of operation therefore includes control by a memory controller which, in one embodiment, is configured to configure a host sector application flag table in the memory array, the flag table associating each flag value with an address in the memory array where information associated with that flag value is stored. In a second embodiment the controller is configured to (a) write at least one page of information to the memory, each page having a plurality of sectors, each of the at least one pages including a page header having a flag value associated with information written to the page, and (b) configure an exception block in memory, the exception block including exception entries, each exception entry having at least an exception flag value and address information identifying an address range in the memory array to which the exception flag value applies.

REFERENCES:
patent: 2006/0026338 (2006-02-01), Ebara et al.

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