Secondary clock source for low power, fast response clocking

Details Secondary clock source for low power, fast response clocking Secondary clock source for low power, fast response clocking

1995-09-29

1996-08-27

Hudspeth, David R.

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

326 9, 327147, 327276, H03K 19096

Patent

active

055504892

ABSTRACT:
An integrated digital logic circuit includes a free-running secondary clock oscillator for generating free-running clocking pulses and a frequency-stabilized master oscillator for generating primary clocking pulses. A clock signal selector selects and puts out either the secondary clocking pulses or the primary clocking pulses depending upon integrated circuit operations/applications. A method for rapidly generating clocking signals during an integrated circuit start-up interval is also described.

REFERENCES:
patent: 4941151 (1990-07-01), Abbiate et al.
patent: 4970418 (1990-11-01), Masterson
patent: 5208557 (1993-05-01), Kersh, III
patent: 5233316 (1993-08-01), Yamada et al.
patent: 5418822 (1995-05-01), Schrachter et al.
patent: 5469116 (1995-11-01), Slemmer
patent: 5471176 (1995-11-01), Henson et al.
patent: 5488325 (1996-01-01), Sato et al.

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