Second order demodulator for sigma-delta digital to analog conve

Details Second order demodulator for sigma-delta digital to analog conve Second order demodulator for sigma-delta digital to analog conve

1996-12-26

1998-10-13

Gaffin, Jeffrey A.

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

H03M 300

Patent

active

058218912

ABSTRACT:
A demodulator subsystem incorporates second-order filtering for use within a sigma-delta DAC. A conventional demodulator is modified to include circuitry which manifests a second-order filtering response to the output of the demodulator. The added circuitry includes an additional pair of phased switched capacitor legs and a fixed capacitor. The combination of the additional circuitry with the existing phase switched and fixed capacitors of the conventional demodulator creates an additional pole which provides second order filtering to the demodulator output, effectively eliminating the high-order post filtering and minimizing both the circuit area required for implementation of the demodulator and its power consumption.

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Kwan, et al., "A Stereo Multi-Bit .SIGMA..increment. D/A with Asynchronous Master Clock Interface", 1996 IEEE International Solid-State Circuits Conference, Feb. 1996, pp. 226-227.
Shi, et al., "A 2.4 V, 700 .mu.w, 0.18 MM.sup.2 Second-Order Demodulator for High-Resolution .SIGMA..increment. DAC's", IEEE Custom Integrated Circuits Conference 1997, May 1997, v Session 13, Paper 13.3.

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