Sealing and stress relief layers and use thereof

Details Sealing and stress relief layers and use thereof Sealing and stress relief layers and use thereof

1988-03-11

1989-11-14

Powell, William A.

Stock material or miscellaneous articles

Structurally defined web or sheet

Discontinuous or differential coating, impregnation or bond

29846, 29851, 29852, 156 89, 156630, 156643, 156644, 21912169, 264 61, 361403, 427 96, 428210, 428446, 428458, 428601, 428901, B32B 300, B32B 700, B44C 122, B29C 3700

Patent

active

048806846

ABSTRACT:
Sealing and stress relief are provided to a low-fracture strength glass-ceramic substrate. Hermeticity is addressed through the use of capture pads in alignment with vias and through polymer overlays with interconnection between the underlying via or pad metallurgy and the device, chip, wire or pin bonded to the surface of the layer. Multilevel structures are taught along with a self-aligned sealing and wiring process.

REFERENCES:
patent: 3683105 (1972-08-01), Shamash et al.
patent: 4067099 (1978-01-01), Ito et al.
patent: 4237606 (1980-12-01), Niwa et al.
patent: 4386116 (1983-05-01), Nair et al.
patent: 4430365 (1984-02-01), Schaible et al.
patent: 4569876 (1986-02-01), Nakakita
patent: 4624896 (1986-11-01), Watanabe et al.
patent: 4799983 (1989-01-01), Desail
patent: 4805683 (1989-02-01), Magdo et al.
IBM Technical Disclosure Bulletin, vol. 24, No. 10, Mar. 1982, pp. 5111-5112, "Interlevel Connections for MLC" by Desai et al.
IBM Technical Disclosure Bulletin, vol. 15, No. 6, Nov. 1972, p. 1974, "Multilayer Ceramic Module Leak Rates" by L. V. Gregor et al.

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