Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Patent
1994-07-25
1997-12-23
Graybill, David
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
257724, 257786, 257787, H01L 2328, H01L 23535, H01L 23538, H01L 25065
Patent
active
057010315
ABSTRACT:
A pair of DRAM chips 1A and 1B are mounted opposedly to each other with wiring means such as lead frames put therebetween, the lead frames being substantially integral with external terminals 3B. Then, these DRAM chips and lead frames are connected together by the conventional wire bonding method. Plural pairs of the thus-connected DRAM chips and lead frames are stacked and corresponding leads of the lead frames are connected in common to form a laminate. The plural DRAM chips thus mounted are activated selectively in accordance with a predetermined chip selection signal. Additionally, partial DRAM chips capable of partially functioning normally are combined together by utilizing the above chip mounting method to constitute a single DRAM package.
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Anjoh Ichiro
Ishihara Masamichi
Ito Kazuya
Kasama Yasuhiro
Matsuno Youichi
Graybill David
Hitachi , Ltd.
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