Sealed nitride layer for integrated circuits

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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C257S640000

Reexamination Certificate

active

07071111

ABSTRACT:
The present invention relates to an integrated circuit having a sealed nitride layer. In one embodiment, a method of forming a sealing nitride layer overlaying a silicon oxide layer in a contact opening of an integrated circuit is disclosed. The method comprises, forming a second layer of nitride overlaying a first layer of nitride to form the sealing nitride layer. The second layer of nitride further overlays an exposed portion of a surface of a substrate in the contact opening and sidewalls of the contact opening. Using reactive ion etching (RIE etch) without a mask to remove a portion of the second nitride layer adjacent the surface of the substrate in the contact opening to expose a portion of the surface of the substrate in the contact opening without removing portions of the second nitride layer covering the sidewalls of the contact opening.

REFERENCES:
patent: 5679601 (1997-10-01), Wu
patent: 6486033 (2002-11-01), Tu et al.
patent: 6573548 (2003-06-01), Leung et al.
patent: 2001/0012655 (2001-08-01), Nordstom et al.
S. Wollf and R.N. Tauber, “Silicon Processing for the VLSi Era: vol. 1—Process Technology,” Lattice Press, Sunset Beach, CA (1986), pp. 321-324.

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