Static information storage and retrieval – Read/write circuit – Sipo/piso
Reexamination Certificate
2001-08-14
2002-05-21
Mai, Son (Department: 2818)
Static information storage and retrieval
Read/write circuit
Sipo/piso
C365S189020, C365S233100
Reexamination Certificate
active
06392946
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The invention relates a memory converter and the apparatus for applying the same. More particularly, the invention relates to a SDR and QDR converter, and an interface card, a motherboard, a memory module and a portable computer motherboard using the QDR and SRD converter.
2. Related Art
Along with the advancement in techniques for wafer fabrication package process, and in addition to the rapid growth in processing speed of the central processing unit (CPU), various alterations of a computer's memory management have occurred. Demand for access speed has pushed the development of memory from the early dynamic random access memory (DRAM), the extended data output put random access memory (EDO RAM), to the current synchronous data rate RAM (SDR RAM) and double data rate RAM (DDR RAM). Currently, the fabrication cost for DDR RAM's is very high. Therefore, if one can implement SDR RAM to the efficiency of the DDR RAM or an even higher efficiency, fabrication cost will be reduced.
SUMMARY OF THE INVENTION
The present invention provides a method and a structure with a higher access speed to improve the performance of the SDR RAM. The structure is called “quadruple data rate RAM (QDR)”. The invention includes the formation of the QDR signal system and the conversion method between the SDR and QDR signal systems. The conversion structure and method provided by the invention can be applied to all the electronic equipment that requires RAM, such as interface cards, motherboards and the portable computer motherboards.
The SDR and QDR converter provided by the invention has a QDR interface, a SDR interface, a clock controller, a command controller, a state register and a data converter. The QDR interface is used to exchange a signal with a QDR device. The SDR interface is used to exchange a signal with a SDR device. The clock controller converts the clock signal sent from the QDR device into a clock used by the converter and the SDR device. After receiving a QDR command signal from the QDR device, the command controller processes the QDR command signal into a corresponding SDR command signal and outputs the SDR command signal into the SDR device. The state register is used to store data of the mode register set (MRS) and the extended mode register set (MRS), and to provide conversion data to the command controller for appropriate command and data conversion. The data converter is used to convert the QDR data format into a SDR data format, and convert the SDR data format into a QDR data format.
In one embodiment of the invention, the data converter comprises a data mask and probe controller, a QDR-to-SDR data converter and an SDR-to-QDR data converter. The data mask and probe controller is used to obtain the QM signal and DQS signal of the QDR device. The QM signal is then converted into a SDR QM signal output to the SDR device, while the DQS signal is converted into a data extract signal for the QDR device to extract data from the SDR device. The QDR-to-SDR data converter converts the serial signal of the QDR device into a parallel signal. At the command of the command controller, a parallel signal is sent to four SDR devices. The SDR-to-QDR data converter converts two data signals of the SDR device into the serial signals used by the QDR device, which are then sent to the QDR device according to the command output from the command controller.
According to the above, a conversion channel is established between QDR and SDR, so that SDR can operate normally in a system or apparatus supporting QDR without converting the system or apparatus into a SDR supporting system or apparatus. The DDR and SDR can thus operate normally simultaneously.
Therefore, the user does not have to buy an additional QDR memory module. The invention uses the existent SDR memory module to upgrade to a memory module with both the SDR and QDR functions.
To the manufacturer, SDR chips with a lower cost can be selected while manufacturing the interface, motherboard and the related printed circuit boards to obtain a product with the QDR data process effect. The quality and performance of the product are enhanced without raising the fabrication cost.
REFERENCES:
patent: 6061292 (2000-05-01), Su et al.
patent: 6157560 (2000-12-01), Zheng
patent: 6275441 (2001-08-01), Oh
Chuang Hai Feng
Wu Kun Ho
J.C. Patents
Leadtek Research Inc.
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