Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2001-02-05
2003-01-14
Lane, Jack A. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S167000
Reexamination Certificate
active
06507888
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 90100095, filed Jan. 3, 2001.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a memory conversion device, and associated devices. More particularly, the present invention relates to a synchronous dynamic random access memory (SDRAM), and double data rate synchronous dynamic random access memory (DDR SDRAM) conversion device, and associated interface card, main board, memory module, portable computer main board and portable computer memory module.
2. Description of Related Art
Due to rapid progress in computer fabricating techniques, the processing speed of central processing units (CPU) has increased considerably. Such a rapid change in the processing speed of CPU has also lead to some changes in the basic requirements of memory. Besides having a high memory capacity, commonly used memory must have a fast access speed. Earlier types of memories including dynamic random access memory (DRAM), and extended data output random access memory (EDO RAM), has been gradually replaced by faster synchronous dynamic random access memory (SDRAM). In recent years, an even faster type of memory known as double data rate (DDR) SDRAM has been brought to market. This DDR SDRAM has enjoyed a rapid growth in the electronic industry.
Although innovative techniques that increase the operating speed of a memory device have many benefits, it also leads to new kinds of defects. One obvious defect is the rapid replacement of old devices. Due to the appearance of DDR SDRAM (hereafter DDR for short), SDRAM (hereafter SDR for short) is gradually being replaced. However, the price of DDR products is still considerably above the price of SDR products. Consequently, conversion devices that render both SDR and DDR products useful have been developed. At present, most DDR and SDR conversion devices can use SDR or DDR only. In general, these conversion devices forbid the use of both SDR and DDR at the same time. Hence, a memory purchaser is faced with a memory conformity problem.
Nowadays, most chip manufacturers claim their products can support both SDR and DDR modules. In practice, one needs to reset the conversion mode before the other type of memory module can be used. To support DDR modules, the supporting mode must be switched to DDR. Once the DDR mode is selected, SDR modules can no longer be used. Similarly, to support SDR modules, the supporting mode must be switched to SDR. Again, the DDR modules cannot be used once the SDR mode is selected. In other words, although the chip can accommodate both the SDR and the DDR modules, only one type of memory modules can be used through a preliminary selection. It is impossible to use both the SDR and the DDR modules at the same time.
SUMMARY OF THE INVENTION
Accordingly, one object of the present invention is to provide a synchronous dynamic random access memory (SDR) and double data rate synchronous dynamic random access memory (DDR) conversion device, and associated interface card, main board, and memory module interface. The conversion device provides supports such that various other devices including an interface card, main board and portable computer motherboard can use SDR and DDR modules at the same time without any memory conformity problem.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides an SDR and DDR conversion device. The conversion device includes a DDR interface device, an SDR interface device, a clock controller, an instruction controller, a state register set, and a data conversion device. The DDR interface device exchanges signals with the DDR device, while the SDR interface device exchanges signals with the SDR device. The clock controller receives the clock signal from the DDR device and converts the signal into a clock signal suitable for operating between the conversion device and the SDR device. The clock controller also provides an internal clocking signal for the conversion device. The instruction controller picks up and converts the DDR instructions to SDR instructions. The data conversion device is triggered when a data read/write instruction is executed. The state register set is used for holding the data held by a mode register set (MRS) and an extended mode register set (EMRS) inside the DDR interface during operation. The state register set also provides conversion data to the instruction controller for carrying out appropriate instruction and data conversion. The data conversion device is responsible for transforming DDR data into an SDR data mode, and vice versa.
In one preferred embodiment of this invention, the data conversion device includes a data mask and strobe controller, a DDR-to-SDR data converter, and an SDR-to-DDR data converter. The data mask and strobe controller receives a DDR data mask signal (DM signal) and a DDR data strobe signal (DQS signal) from the DDR device. Inside the data mask and strobe controller, the DDR data mask signal is converted to an SDR mask signal (DQM) while the DDR data strobe signal is converted to a data signal for accessing a SDR device. In addition, the data mask and strobe controller are able to transmit a DDR data strobe signal to the DDR device according to the instruction provided by the instruction controller. The DDR-to-SDR data converter converts serial signal from the DDR device into a parallel signal and transmits the parallel signal to two separate SDR devices according to the instruction provided by the instruction controller. The SDR-to-DDR data converter converts data signals from two separate SDR devices into a serial signal and transmits the serial signal to the DDR device according to the instruction provided by the instruction controller.
In brief, this invention utilizes the establishment of a conversion channel between DDR and SDR modules so that the SDR modules can operate normally under a DDR supporting system or device. In other words, there is no need to convert the entire DDR supporting system or device into an SDR supporting system or device so that both SDR and DDR modules can operate concurrently.
For the user of the conversion device, new DDR modules need not be purchased in order to have DDR module efficiency. The existing SDR modules can be re-used in the system, thereby saving some cost for memory upgrading.
For semiconductor manufacturers, cheaper SDR chips can be used in printed circuit boards such as interface cards and motherboards if the conversion device of this invention is employed. Despite having cheaper SDR chips, the printed circuit board has a quality and performance equivalent to the one using the more expensive DDR chips.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 6337832 (2002-01-01), Ooishi et al.
patent: 2001/0039602 (2001-11-01), Kanda et al.
patent: 2002/0042898 (2002-04-01), Jones et al.
patent: 2332964 (1999-07-01), None
Chiang Chun Ta
Chuang Hai Feng
Wu Kun Ho
J.C. Patents
Lane Jack A.
Leadtek Research Inc.
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