Screening circuitry for a dynamic random access memory

Static information storage and retrieval – Read/write circuit – Data refresh

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Details

36518909, 365193, 365201, 36523003, 365233, G11C 700

Patent

active

054756464

ABSTRACT:
A dynamic random access memory comprising a dynamic memory section, a first screening-test pad, a second screening-test pad, and a mode-setting circuit. The dynamic memory section includes a memory-cell array having dynamic-type memory cells (MC) arranged in rows and columns, a row circuit and a column circuit, both connected to the memory-cell array, and a refresh counter for generating a refresh address signal for refreshing the dynamic-type memory cells when the dynamic memory section is set in a CBR refresh mode. The first screening-test pad receives a first external control signal for setting the dynamic memory section in an ordinary mode or a screening-test mode. The second screening-test pad receives a second external control signal for setting the dynamic memory section in the CBR refresh mode. The mode-setting circuit detects whether or not the first control signal and the second external control signal are in predetermined states, and enables the row circuit and the column circuit upon detecting that the first and second control signals are in the predetermined states, thereby to cause the refresh counter to supply the refresh address signal to the row circuit and the column circuit.

REFERENCES:
patent: 4811299 (1989-03-01), Miyazawa et al.
patent: 4943949 (1990-07-01), Yamaguchi et al.
patent: 4992985 (1991-02-01), Miyazawa et al.
patent: 5111433 (1992-05-01), Miyamoto
patent: 5119337 (1992-06-01), Shimizu et al.
patent: 5343430 (1994-08-01), Furuyama

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