Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2000-06-26
2003-01-07
Elmore, Reba I. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C156S203000, C156S208000
Reexamination Certificate
active
06505285
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates in general to a relational database management system, and in particular, to memory management on a parallel processing database system.
2. Description of Related Art
The purpose of this invention is to enable kernel addressable, user accessible memory segments. The problem is to enable such capabilities in a parallel processing relational database management system (RDBMS) that can execute on both WINDOWS NT™ and UNIX operating systems for both symmetric multi-processing (SMP) and massively parallel processing (MPP) hardware architectures. The problem for the RDBMS is to design it in such a manner as to allow the RDBMS to execute independent of operating system models.
To accommodate the various operating systems, kernel addressable, user accessible memory segments must be controllable by a single entity within the system and be lockable and coherent among multiple processes. To provide these abilities in the UNIX environment, a page table of database processes may be directly modified. However, such direct page table modification is not available or possible in the WINDOWS NT operating system. Further, a number of requirements exist for the passing of segments between a parent and child process, and between user processes and kernel threads. Such requirements are in direct contradiction to the WINDOWS NT shared memory model.
SUMMARY OF THE INVENTION
To overcome the limitations in the prior art described above, and to overcome other limitations that will become apparent upon reading and understanding the present specification, the present invention discloses a parallel processing architecture for a relational database management system (RDBMS) that manages and allocates memory as mappings of offsets from a file storage location to one or more threads. The RDBMS is implemented as a shared nothing, single database image utilizing Parallel Database Extensions (PDEs) comprised of various subsystems for managing memory and providing storage locations for threads.
Embodiments provide for a segment (SEG) subsystem of the PDE that provides services for creating, manipulating, and destroying access to data segments in address space. The SEG subsystem works with transient segments (also referred to as scratch segments) that are created during initialization of the PDE as offsets in a file. The offsets are stored in objects/elements in a queue.
REFERENCES:
patent: 4742447 (1988-05-01), Duvall et al.
patent: 5519846 (1996-05-01), Swenson
patent: 5652853 (1997-07-01), Duvalsaint et al.
patent: 5778395 (1998-07-01), Whiting et al.
patent: 5960181 (1999-09-01), Sanadidi et al.
patent: 5978576 (1999-11-01), Sanadidi et al.
patent: 6078994 (2000-06-01), Carey
patent: 6351749 (2002-02-01), Brown et al.
patent: 6415280 (2002-07-01), Farber et al.
“Dual Task Hardware Partitioned Local Working Store” IBM Technical Disclosure Bulletin, IBM Corp. New York, US, vol. 40, No. 2, Feb. 1, 1997, pp. 29-31, XP000692159, ISSN 0018-8689.
H.P. Katseff & B.S. Robinson, “Predictive Prefetch in the Nemesis Multimedia Information Service,” ACM 1994, pp. 201-209.
W.C. Brantley, K.P. McAuliffe, J. Weiss, “The Cache,” IEEE, 1985, pp. 782-789.
A. Witkowski, F. Carino & P. Kostamaa, “NCR 3700—The Next Generation Industrial Database Computer,” Proceeding of the 19thVLDB Conference, Dublin, Ireland, 1993, 14 pages.
F. Carino, Jr., W. Sterling, P. Kostamaa, “Industrial Database Supercomputer Exegesis: The DBC/1012, The NCR 3700, The Ynet, and The Bynet,”Teradata Advanced Concepts Laboratory, 1994, pp. 139-157.
TechEncyclopedia, “virtual memory,” http://www.techweb.com/encyclopedia/defineterm?term=virtual+memory, Mar. 10, 2000, 1 page.
TechEncyclopedia, “kernel,” http://www.techweb.com/encyclopedia/defineterm?term=KERNEL&exact=1, Mar. 10, 2000, 1 page.
Miller Daniel H.
Rabinovici Sorana
Elmore Reba I.
Gates & Cooper
NCR Corporation
LandOfFree
Scratch segment subsystem for a parallel processing database... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Scratch segment subsystem for a parallel processing database..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Scratch segment subsystem for a parallel processing database... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3038466