Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2006-06-27
2006-06-27
Padmanabhan, Mano (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S118000, C365S185040, C365S189050
Reexamination Certificate
active
07069377
ABSTRACT:
A memory device has a scratch control array of non-volatile memory cells that is separate from the primary array of memory cells. The scratch control array stores an instruction sequence for execution by the memory device's controller circuit. The sequence can include instructions for testing of the memory device. The execution of the instruction sequence is initiated and the control circuit fetches each instruction from the scratch control array for execution. The results are then reported and/or stored in the scratch control array.
REFERENCES:
patent: 5539699 (1996-07-01), Sato et al.
patent: 5867430 (1999-02-01), Chen et al.
patent: 6041001 (2000-03-01), Estakhri
patent: 6477672 (2002-11-01), Satoh
patent: 6747894 (2004-06-01), Kawamura
patent: 2004/0049628 (2004-03-01), Lin et al.
patent: 2004/0128594 (2004-07-01), Elmhurst et al.
Doan Duc T
Leffert Jay & Polglaze PA
Micro)n Technology, Inc.
Padmanabhan Mano
LandOfFree
Scratch control memory array in a flash memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Scratch control memory array in a flash memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Scratch control memory array in a flash memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3669312