SCRAM cell employing substantially vertically elongated pull-up

Details SCRAM cell employing substantially vertically elongated pull-up SCRAM cell employing substantially vertically elongated pull-up

1997-03-11

1998-12-01

Nguyen, Vet Q.

Static information storage and retrieval

Systems using particular element

Flip-flop

365174, 365188, H01L 2702

Patent

active

058448357

ABSTRACT:
An SRAM cell having at least four field effect transistors includes, a) at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and b) the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates. In an additional aspect, an SRAM cell having at least four field effect transistors includes, i) at least four transistor gates, an electrical interconnect line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and ii) the Vcc line and the electrical interconnect line being provided in different respective is elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates.

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