Schottky enhanced CMOS output circuit

Details Schottky enhanced CMOS output circuit Schottky enhanced CMOS output circuit

1993-05-13

1996-04-30

Westin, Edward P.

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

326116, 326 83, H03K 1920, H03K 19094

Patent

active

RE0352217

ABSTRACT:
The high impedance state of a tri-state CMOS transistor output circuit is enhanced by serially connecting first and second Schottky diodes with the P-channel transistor and the N-channel transistor whereby in the high impedance state reverse bias of the substrate/source-drain diodes of the two transistors is prevented when the output of the circuit is taken beyond the supply voltage potentials of the output circuit.

REFERENCES:
patent: 4023122 (1977-05-01), Oura
patent: 4578600 (1986-03-01), Magee
patent: 4740713 (1988-04-01), Sakurai et al.
patent: 4791321 (1988-12-01), Tanaka et al.
patent: 4801983 (1989-01-01), Ueno et al.
patent: 4996449 (1991-02-01), Ueno
patent: 5097153 (1992-03-01), Mahler et al.
patent: 5233237 (1993-08-01), Ohannes et al.

Affiliated with

Also associated with

Rating

Schottky enhanced CMOS output circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Schottky enhanced CMOS output circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Schottky enhanced CMOS output circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-620587