Schmoo runtime reduction and dynamic calibration based on a...

Details Schmoo runtime reduction and dynamic calibration based on a... Schmoo runtime reduction and dynamic calibration based on a...

2007-03-13

2007-03-13

Bragdon, Reginald G. (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S167000, C711S170000

Reexamination Certificate

active

10737358

ABSTRACT:
Methods of setting numerically controlled delay lines using step sizes based on a delay locked loop lock value are presented herein. In one embodiment, a method may comprise, for example, one or more of the following: calculating an offset value for at least one NCDL; and interpolating a new offset value for the at least one NCDL, based on a change in a delay locked loop (DLL) output value from a previous DLL output value to a new DLL output value.

REFERENCES:
patent: 6975557 (2005-12-01), D'Luna et al.
patent: 7023760 (2006-04-01), Hellwig
patent: 2004/0098647 (2004-05-01), Pande et al.

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