Electrical computers and digital processing systems: processing – Processing control
Reexamination Certificate
2005-06-28
2005-06-28
Tsai, Henry W. H. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
C712S226000
Reexamination Certificate
active
06912649
ABSTRACT:
Methods, articles of manufacture and systems for encoding an instruction are provided, whereby available bits within the instruction can be indicated for use. The available bits may include zero bits and constant bits. In one embodiment available bits include any bits within an expanded word that are not necessary for the execution of an instruction contained in the word. In another embodiment, bits are made available by reformatting/re-encoding a word, whereby the number of bits of some fields is abbreviated to a lesser number of bits.
REFERENCES:
patent: 5867501 (1999-02-01), Horst et al.
patent: 6016544 (2000-01-01), Henry et al.
patent: 2001/0013093 (2001-08-01), Banno et al.
patent: 2002/0152368 (2002-10-01), Nakamura
International Business Machines - Corporation
Moser Patterson & Sheridan LLP
Tsai Henry W. H.
LandOfFree
Scheme to encode predicted values into an instruction... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Scheme to encode predicted values into an instruction..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Scheme to encode predicted values into an instruction... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3519840