Scheme of level shifter cell

Details Scheme of level shifter cell Scheme of level shifter cell

2008-03-05

2009-06-16

Le, Don P (Department: 2819)

Electronic digital logic circuitry

Interface

Logic level shifting

C326S081000

Reexamination Certificate

active

07548093

ABSTRACT:
A system having voltage level shifting capabilities, the system includes a logic circuit and a multiple level voltage supply circuit; wherein the logic circuit comprises at least one PMOS transistor and at least one NMOS transistor; wherein the logic circuit receives an input signal, receives a voltage supply signal from the multiple level voltage supply circuit, and outputs an output signal via a first node; wherein the input signal has a low voltage swing between a low level supply voltage and a rail voltage; wherein the output signal has a high voltage swing between a high level supply voltage and the rail voltage; and wherein the multiple level voltage supply circuit selects, in response to a level of the output signal, whether to provide to the supply node of the logic circuit a high level supply voltage or a low level supply voltage.

REFERENCES:
patent: 5438542 (1995-08-01), Atsumi et al.
patent: 5668758 (1997-09-01), Yiu et al.
patent: 6163179 (2000-12-01), Huang et al.
patent: 6469542 (2002-10-01), Manning
patent: 2008/0094105 (2008-04-01), Santurkar et al.

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